1. Field of the Invention
The present invention relates to an electronic component and a manufacturing method thereof and, more particularly, to a coil component such as a common mode filter and a manufacturing method thereof.
2. Description of Related Art
A common mode filter, which is known as one of electronic components, is widely used as a noise suppression component for a differential transmission line. Recent progress of manufacturing technology allows the common mode filter to be realized as a very small surface mount chip component (see, for example, Japanese Patent Application Laid-open No. 2011-14747), and a coil pattern to be incorporated is significantly reduced in size and space. However, when a thickness of the coil pattern is excessively small, DC resistance increases. Thus, it is desired to increase the thickness of a planar coil pattern as much as possible so as to prevent the increase in the DC resistance.
In the common mode filter, on the same plane on which the planar coil pattern is formed, there is also formed another conductor pattern such as a contact hole conductor or an internal terminal electrode. When the coil pattern needs to be formed thick by plating, a plating condition is optimized according to the coil pattern. However, when the coil pattern and another conductor pattern are simultaneously formed under such a plating condition, plating on the another conductor pattern having a comparatively large area grows up excessively, disadvantageously resulting in a large variation in height between the conductor patterns in the same conductor layer.
Particularly, as shown in FIG. 12A, a conductor pattern 32 having a slightly larger width (area) than that of a coil pattern 31 tends to assume a shape in which a center portion of a top surface thereof bulges. Further, as shown in FIG. 12B, a conductor pattern 33 having a considerably larger width (area) than that of the coil pattern 31 tends to assume a shape in which a portion around an outer periphery of a top surface thereof bulges, while a center portion thereof sags.
As shown in FIGS. 12A and 12B, such a variation in thickness between the conductor patterns becomes more noticeable as the thickness of the coil pattern 31 becomes large and is further emphasized by lamination of layers. When the conductor layers each including the conductor patterns varying in height are laminated to achieve a multilayer structure, flatness of a top surface of a conductor pattern formed in a topmost layer is significantly deteriorated due to a cumulative variation in height, which may in turn cause a conductor pattern P2 in the topmost layer to be exposed from the top surface of the insulating layer to lead to an insulation failure.
Further, when the top surface of the conductor pattern serving as a base surface for forming an opening by exposure of an insulating layer covering the conductor patterns bulges or sags, irregular reflection is caused on the top surface to cause defocus in an exposure unit, which degrades pattern processing accuracy. For these reasons, it is preferable, and required, that all conductor patterns formed within a conductor layer each have substantially the same height as the coil pattern and top surfaces thereof are flat.